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DTXT_TITLE: IBM Blue Gene/L Projekt - eine Zukunftsvision (2003) DOC_TYPE: Image ARCHIV: 1000 FIL_ID: 50789201 FIL_ORG: 83866.tif FIL_EXT: tif FIL_WIDTH: 2699 FIL_HEIGHT: 1981 FIL_RES: 600 FIL_SIZE: 21407092 FIL_COLOR: CMYK FIL_ROTATE: FIL_CLIP: FIL_CROP: FIL_IMG: FIL_PATH: DOC_SPERRVERMERK: DOC_INPUT: 12-01-2005 14:55:40 DOC_UPDATE: 13-02-2008 10:54:45 DOC_STATUS: 1 DOC_KATALOG: 1 DOC_SPERR: 1 BESCHREIBUNG: Die kürzlich veröffentlichte Liste der Top 500 Supercomputer (www.top500.org) weist IBM als den Hersteller mit der größten Anzahl installierter Superrechner-Systeme aus. In der Liste stehen genau 224 Systeme von IBM. Mit seinem radikal neuen Systemdesign läutet der Blue Gene/L eine neue Ära des Supercomputings ein. Blue Gene/L ist 20 Mal kleiner als andere Maschinen von vergleichbarer Leistung und ermöglicht eine drastische Reduktion von Energieverbrauch, Kosten und Platzbedarf. Die enorm hohe Rechenleistung des Systems, vereint in einem extrem kleinen Gehäuse, zeigt auf, welche Richtung Supercomputing künftig einschlagen kann, um die Balance zwischen weiter steigender Leistung und erforderlichem Aufwand zuhalten. Der auf Platz vier vorgerückte Blue Gene Prototyp hat bereits heute eine Peak-Leistung von 16 Teraflops und integriert mehr als 8000 PowerPC-Prozessoren. Damit hat er lediglich 1/16 seiner Endausbaustufe erreicht. Bei erwarteter Fertigstellung im Jahr 2005 rechnet IBM damit, dass Blue Gene/L an die Spitze der Top500 Supercomputer-Liste kommen wird. Die komplette Blue Gene/L-Maschine, die gerade am Lawrence Livermore National Laboratory in Kalifornien entsteht, wird etwa 64 Racks füllen. BlueGene/L is a scalable system in which the maximum number of compute nodes assigned to a single parallel job is 216 = 65,536. BlueGene/L is configured as a 64 x 32 x 32 three-dimensional torus of compute nodes. Each node consists of a single ASIC and memory. Each node can support up to 2 GB of local memory; our current plan calls for 9 SDRAM-DDR memory chips with 256 MB of memory per node. The ASIC that powers the nodes is based on IBM\'s system-on-a-chip technology and incorporates all of the functionality needed by BG/L. The nodes themselves are physically small, with an expected 11.1-mm square die size, allowing for a very high density of processing. The ASIC uses IBM CMOS CU-11 0.13 micron technology and is designed to operate at a target speed of 700 MHz, although the actual clock rate used in BG/L will not be known until chips are available in quantity. The current design for BG/L system packaging is shown in Figure 1. (Note that this is different from a preliminary design shown in [ISSCC02] as are certain bandwidth figures that have been updated to reflect a change in the underlying signaling technology.) The design calls for 2 nodes per compute card, 16 compute cards per node board, 16 node boards per 512-node midplane of approximate size 17?x 24?x 34,? and two midplanes in a 1024-node rack. Each processor can perform 4 floating point operations per cycle (in the form of two 64-bit floating point multiply-add?s per cycle); at the target frequency this amounts to approximately 1.4 teraFLOPS peak performance for a single midplane of BG/L nodes, if we count only a single processor per node. Each node contains a second processor, identical to the first although not included in the 1.4 teraFLOPS performance number, intended primarily for handling message passing operations. In addition, the system provides for a flexible number of additional dual-processor I/O nodes, up to a maximum of one I/O node for every eight compute nodes. For the machine with 65,536 compute nodes, we expect to have a ratio one I/O node for every 64 compute nodes. I/O nodes use the same ASIC as the compute nodes, have expanded external memory and gigabit Ethernet connections. Each compute node executes a lightweight kernel. The compute node kernel handles basic communication tasks and all the functions necessary for high performance scientific code. For compiling, diagnostics, and analysis, a host computer is required. An I/O node handles communication between a compute node and other systems, including the host and file servers. The choice of host will depend on the class of applications and their bandwidth and performance requirements. The nodes are interconnected through five networks: a 3D torus network for point-topoint messaging between compute nodes, a global combining/broadcast tree for collective operations such as MPI_Allreduce over the entire application, a global barrier and interrupt network, a Gigabit Ethernet to JTAG network for machine control, and another Gigabit Ethernet network for connection to other systems, such as hosts and file systems. For cost and overall system efficiency, compute nodes are not hooked directly up to the Gigabit Ethernet, but rather use the global tree for communicating with their I/O nodes, while the I/O nodes use the Gigabit Ethernet to communicate to other systems. In addition to the compute ASIC, there is a ?link? ASIC. When crossing a midplane boundary, BG/L?s torus, global combining tree and global interrupt signals pass through the BG/L link ASIC. This ASIC serves two functions. First, it redrives signals over the cables between BG/L midplanes, improving the high-speed signal shape and amplitude in the middle of a long, lossy trace-cable-trace connection between nodes on different midplanes. Second, the link ASIC can redirect signals between its different ports. This redirection function enables BG/L to be partitioned into multiple, logically separate systems in which there is no traffic interference between systems. This capability also enables additional midplanes to be cabled as spares to the system and used, as needed, upon failures. Each of the partitions formed through this manner has its own torus, tree and barrier networks which are isolated from all traffic from all other partitions on these networks. BU: RUBRIK: Forschung Technologie Fertigung BILDART: Infografik STICHWORTE: supercomputer, Grafik, Schaubild, IBM_NUMMER: 83866 FARBE: farbig FORMAT: Quer ORIGINAL: Digital BILDRECHTE: IBM BILDQUELLE: https://217.28.160.76:9090/index.jsp, Bild: BG03BB-06 EINGABE: Häßler PRODUKTFAMILIE: IBM System Blue Gene PRODUKT: IBM Blue Gene/L EXPORTPATH: 28/images/50789201.tif

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