Bildergalerie: Description 50876678 in Directory 33
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DTXT_TITLE: Neues Verfahren zur Kühlung von 3-D-Chips - Kühlung mit H2O (2008) DOC_TYPE: Image ARCHIV: 1000 FIL_ID: 50876678 FIL_ORG: 88786.jpg FIL_EXT: jpg FIL_WIDTH: 1181 FIL_HEIGHT: 760 FIL_RES: 300 FIL_SIZE: 698188 FIL_COLOR: RGB FIL_ROTATE: FIL_CLIP: FIL_CROP: FIL_IMG: FIL_PATH: DOC_SPERRVERMERK: DOC_INPUT: 05-06-2008 10:19:23 DOC_UPDATE: 05-06-2008 10:23:30 DOC_STATUS: 1 DOC_KATALOG: 1 DOC_SPERR: 1 BESCHREIBUNG: Die IBM kühlt 3-D-Chips mit H2O. Fortschritte in der Wasserkühlung ebnen den Weg für grüne Computerzentren. MADE IN IBM LABS: IBM Cools 3-D Chips with H2O. Water Cooling Advance Paves Way for Green Data Centers. Zurich, Switzerland - 05 Jun 2008: In IBM's labs, tiny rivers of water are cooling computer chips that have circuits and components stacked on top of each other, a design that promises to advance Moore's Law in the next decade and significantly reduce energy consumed by data centers. IBM Researchers, in collaboration with the Fraunhofer Institute in Berlin, demonstrated a prototype that integrates the cooling system into the 3-D chips by piping water directly between each layer in the stack. These so-called 3-D chip stacks Ö which take chips and memory devices that traditionally sit side-by-side on a silicon wafer and stacks them together on top of one another -- presents one of the most promising approaches to enhancing chip performance beyond its predicted limits. This follows IBM's leadership in advancing chip-stacking technology in a manufacturing environment a year ago, which shortens the distance information on a chip needs to travel by 1000 times, and allows for the addition of up to 100 times more channels, or pathways, for that information to flow compared to 2-D chips. Weitere Informationen unter: http://www-03.ibm.com/press/us/en/pressrelease/24385.wss -------------------------------------------------------- Zum Bild: The photo shows a complete view of a single interlayer 3-D cooling prototype before assembly. The active cooling area, the structured area in the center of the prototype, measures 1 by 1 cm, has a height of 100 microns and contains up to 10,000 vertical interconnects (silicon vias). The pin-fin structure displayed here, which leaves silicon only around the vias to seal the interconnects from water structure, achieved a cooling performance of 180 Watts/cm2 per layer in a stack with an area of 4 cm2. This constitutes a breakthrough. With classic backside cooling, the stacking of two or more high-power density logic layers would be impossible. (Quelle: http://www.zurich.ibm.com/news/08/3D_cooling.html) BU: RUBRIK: Forschung Technologie Fertigung BILDART: Sachaufnahme STICHWORTE: Zürich, Lab, Chips, Chipkühlung, Wasser, Kühlung, Wasserkühlung, wassergekühlte Chips, 3D-Chip, 3D, 3-D IBM_NUMMER: 88786 FARBE: farbig FORMAT: Quer ORIGINAL: Digital BILDRECHTE: IBM BILDQUELLE: Ihttp://www.zurich.ibm.com/news/08/3D_cooling.html EINGABE: Dentz EXPORTPATH: 33/images/50876678.jpg |
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